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Aging effect on apples bio-impedance using AD5933

In this paper, the effect of the fruits aging on bio-impedance is experimentally studied. Bio-impedance analysis, as accurate and fast method is used to investigate and monitor group of apples properties during aging. This method provides an alternative method for investigating apples physical properties that are highly related to chemical properties. AD5933 impedance analyzer chip within the frequency range (5 KHz-100 KHz) and NI-ELVIS board within the frequency range (300 Hz-5 KHz) are used to investigate the changes in apple's properties during aging. According to experimental results, the

Circuit Theory and Applications
Software and Communications

A Scalable Firmware-Over-The-Air Architecture suitable for Industrial IoT Applications

This paper proposes a reliable and scalable architecture for firmware-over-the-air updates, which provides remote cloud real-time distribution of new firmware versions on industrial machines in an efficient simultaneous manner. The architecture comprises remotely interconnected software and hardware systems for handling the procedures of firmware distribution over a wireless network. The main contributions are developing a special boot-loader for ARM micro-controllers and an Android application for performing FOTA updates. A simulation is performed using Web and Android applications showing

Circuit Theory and Applications
Software and Communications

A novel image encryption system merging fractional-order edge detection and generalized chaotic maps

This paper presents a novel lossless image encryption algorithm based on edge detection and generalized chaotic maps for key generation. Generalized chaotic maps, including the fractional-order, the delayed, and the Double-Humped logistic maps, are used to design the pseudo-random number key generator. The generalization parameters add extra degrees of freedom to the system and increase the keyspace achieving more secure keys. Fractional order edge detection filters exhibited better noise robustness than the conventional integer-order ones, rendering the system to be suitable for medical

Circuit Theory and Applications

Generalized family of fractional-order oscillators based on single CFOA and RC network

This paper presents a generalized family of fractional-order oscillators based on single CFOA and RC network. Five RC networks are investigated with their general state matrix, and design equations. The general oscillation frequency, condition and the phase difference between the oscillatory outputs are introduced in terms of the fractional order parameters. They add extra degrees of freedom which in turn increase the design flexibility and controllability that is proved numerically. Spice simulations are introduced to validate the theoretical findings. © 2017 IEEE.

Circuit Theory and Applications

Generic FPGA Design of Spiking Neuron Model

This paper introduces a new representation of the human brain neuron cell response. Implementation of a single cell model of an excitatory and inhibitory neuron. The architecture is based on mimic the real reaction of the neuron cell. Excitatory and inhibitory are implemented in generic form for all neuron's behavior. The design is tested experimentally using FPGA. The designs have been realized, simulated using Xilinx ISE 14.7, and realized on Xilinx FPGA Virtex Artix-7 XC7A100T. The proposed realization shows good performance to be compatible with various applications. © 2020 IEEE.

Circuit Theory and Applications

Low Power Scalable Ternary Hybrid Full Adder Realization

Multi-level electronic systems offer speed and area simplicity, reducing the complexity of implementation and power dissipation. In this paper, a Hybrid ternary Full Adder (FA) is proposed using Conventional Complementary Metal Oxide Semiconductor (CCMOS), Double Pass-transistor Logic (DPL), and Pass Transistors (PT). The proposed FA is extended up to 64-bits to test scalability. To validate the proposed full adder and calculate its performance analysis, the Cadence Virtuoso toolset is used at technology 130nm with supply voltage 0.9V. An extra transistor is added to overcome the sneak path

Circuit Theory and Applications

Identifying the Parameters of Cole Impedance Model Using Magnitude Only and Complex Impedance Measurements: A Metaheuristic Optimization Approach

Due to the good correlation between the physiological and pathological conditions of fruits and vegetables and their equivalent Cole impedance model parameters, an accurate and reliable technique for their identification is sought by many researchers since the introduction of the model in early 1940s. The nonlinear least squares (NLS) and its variants are examples of the conventional optimization techniques that are commonly used in literature to tackle this problem based on complex-valued impedance measurement data. However, as happens in most conventional techniques, the NLS and its variants

Circuit Theory and Applications

Design and Implementation of an Optimized Artificial Human Eardrum Model

This paper introduces a fractional-order eardrum Type-II model, which is derived using fractional calculus to reduce the number of elements compared to its integer-order counterpart. The proposed fractional-order model parameters are extracted and compared using five meta-heuristic optimization techniques. The CMOS implementation of the model is performed using the Design Kit of the Austria Mikro Systeme (AMS) 0.35 μ m CMOS process, while the simulations have been performed using the Cadence IC design suite. © 2019, Springer Science+Business Media, LLC, part of Springer Nature.

Circuit Theory and Applications

On-the-Fly Parallel Processing IP-Core for Image Blur Detection, Compression, and Chaotic Encryption Based on FPGA

This paper presents a 3 in 1 standalone FPGA system which can perform color image blur detection in parallel with compression and encryption. Both blur detection and compression are based on the 3-level Haar wavelet transform, which is used as a common building block to save the resources. The compression is based on performing the hard thresholding scheme followed by the Run Length Encoding (RLE) technique. The encryption is based on the 128-bit Advanced Encryption Standard (AES), which is considered one of the most secure algorithms. Moreover, the modified Lorenz chaotic system is combined

Circuit Theory and Applications

Impact of oustaloup and matsuda approximations on fractional pid controller of pv panel

Due to the non-linear relation between current and voltage of the PV modules, DC/DC power electronic converters are used to adapt this non-linearity. Controllers are used to control the DC/DC converters in order that, they can take actions against changes in irradiance input levels, temperature input levels and load values. In this study, a standalone PV system that feeds a DC load is simulated. Integer order controller and fractional order controller are compared considering two scenarios. The first scenario is to change the irradiance levels while maintaining the load at a constant value. In

Circuit Theory and Applications