The paper proposes voltage-controlled first-and second-order memristor emulators. The emulators are designed using an operational-transconductance amplifier (OTA) and voltage multiplier blocks plus a fractional-order capacitor. The presented second-order emulator provides two pinched points controlled by order of the employed fractional-order capacitor. Numerical and PSPICE simulation results using AD844 and AD633 are introduced for different cases to validate the theoretical findings. The experimental verification is presented, showing the design flexibility and controllability based on the

This work introduces a new successive approximation register circuit (SAR) for SAR analog to digital converter (ADC) based on Dynamic Random Access Memory (DRAM) cells. Based on the proposed DRAM based SAR ADC and a differential capacitive DAC, a 10-bit 2V ADC is designed in 0.18um CMOS technology. The proposed SAR is compared to traditional SAR to verify that the proposed SAR decreases the power of SAR ADC for biomedical applications. The power consumption for the proposed SAR ADC is found to be 26.24uW with ENOB equal to 9.26, and the maximum sampling frequency is 1MHz. For the traditional

The basic idea behind fractional calculus is that it considers derivatives and integrals of non-integer orders giving extra degrees of freedom and tuning knobs for modeling complex and memory dependent systems with compact descriptions. This paper reviews fractional calculus history, theory, and its applications in electrical engineering. The basic definitions of fractional calculus are presented together with some examples. Integer order transfer function approximations and constant phase elements (CPEs) emulators are overviewed due to their importance in implementing fractional-order

The objective of this work is to revisit the design criteria of current-mode simulated inductors in order to realize their fractional-order versions. Numerical simulations and SPICE circuits simulations are carried out on these generalized fractional-order simulated inductors. As well, fractional-order low pass filters based on the proposed circuits are realized and validated. © 2019 IEEE.

By analyzing the issue of chaos synchronization in the literature, it can be noticed the lack of a general approach, which would enable any type of synchronization to be achieved. Similarly, there is the lack of a unified method for synchronizing both continuous-time and discrete-time systems via a scalar signal. This paper and the companion one [1] aim to bridge these two gaps by presenting a novel general unified framework to synchronize chaotic systems via a scalar signal. The framework, based on the concept of observer, enables any type of synchronization defined to date to be achieved for

[No abstract available]

Recently, the memristor based relaxation oscillators become an important topic in circuit theory where the reactive elements are replaced by memristor which occupies a very small area. In this paper, a design of memristor-based relaxation oscillator is introduced based on exponential memristor model. Unlike previously published oscillators which were built based on a simple memristor model, the exponential model is used, as a generalized model, to verify the concept of memristor based RM oscillator using a model that has electrical characteristic very close to the fabricated device. First, the

Implantable probes with built-in light emitters have a promising potential for a range of applications, in particular optogenetic neural stimulation. However, where soft encapsulation methods are used, lifetime will be a function of the quality of encapsulation and the driving mechanism. We have found that a balanced driving mechanism - whereby the integral voltage on encapsulated contacts, can significantly prolong lifetimes. As such, in this work, we have designed a driving circuit that drives current but ensures balanced electric fields with an error of less than 1%. The circuit has been

IoT systems have different technologies such as: RIFD, NFC, 3G, 4G, and Sensors. Their function is to transfer very large sensitive and private data. There are many ethical challenges that need to be taken into consideration by individuals and companies that use this technology. Amongst the challenges is the user awareness of attack risks. This paper discusses different ethical and legal challenges that need to be taken in account for IoT health care applications during the near future. © 2017 IEEE.

This paper presents a 3 in 1 standalone FPGA system which can perform color image blur detection in parallel with compression and encryption. Both blur detection and compression are based on the 3-level Haar wavelet transform, which is used as a common building block to save the resources. The compression is based on performing the hard thresholding scheme followed by the Run Length Encoding (RLE) technique. The encryption is based on the 128-bit Advanced Encryption Standard (AES), which is considered one of the most secure algorithms. Moreover, the modified Lorenz chaotic system is combined