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Improved memristor-based relaxation oscillator
This paper presents an improved memristor-based relaxation oscillator which offers higher frequency and wider tunning range than the existing reactance-less oscillators. It also has the capability of operating on two positive supplies or alternatively a positive and negative supply. Furthermore, it has the advantage that it can be fully integrated on-chip providing an area-efficient solution. On the other hand, The oscillation concept is discussed then a complete mathematical analysis of the proposed oscillator is introduced. Furthermore, the power consumption of the new relaxation circuit is
Fractional canny edge detection for biomedical applications
This paper presents a comparative study of edge detection algorithms based on integer and fractional order differentiation. A performance comparison of the two algorithms has been proposed. Then, a soft computing technique has been applied to both algorithms for better edge detection. From the simulations, it shows that better performance is obtained compared to the classical approach. The noise performances of those algorithms are analyzed upon the addition of random Gaussian noise, as well as the addition of salt and pepper noise. The performance has been compared to peak signal to noise
Design of Positive, Negative, and Alternating Sign Generalized Logistic Maps
The discrete logistic map is one of the most famous discrete chaotic maps which has widely spread applications. This paper investigates a set of four generalized logistic maps where the conventional map is a special case. The proposed maps have extra degrees of freedom which provide different chaotic characteristics and increase the design flexibility required for many applications such as quantitative financial modeling. Based on the maximum chaotic range of the output, the proposed maps can be classified as positive logistic map, mostly positive logistic map, negative logistic map, and
Trajectory control and image encryption using affine transformation of lorenz system
This paper presents a generalization of chaotic systems using two-dimensional affine transformations with six introduced parameters to achieve scaling, reflection, rotation, translation and/or shearing. Hence, the location of the strange attractor in space can be controlled without changing its chaotic dynamics. In addition, the embedded parameters enhance the randomness and sensitivity of the system and control its response. This approach overpasses performing the transformations as post-processing stages by applying them on the resulting time series. Trajectory control through dynamic
New hybrid synchronisation schemes based on coexistence of various types of synchronisation between master-slave hyperchaotic systems
In this paper, we present new approaches to study the co-existence of some types of synchronisation between hyperchaotic dynamical systems. The paper first analyses, based on stability theory of linear continuous-Time systems, the co-existence of the projective synchronisation (PS), the function projective synchronisation (FPS), the full state hybrid function projective synchronisation (FSHFPS) and the generalised synchronisation (GS) between general master and slave hyperchaotic systems. Successively, using Lyapunov stability theory, the coexistence of three different synchronisation types is
High Speed, Approximate Arithmetic Based Convolutional Neural Network Accelerator
Convolutional Neural Networks (CNNs) for Artificial Intelligence (AI) algorithms have been widely used in many applications especially for image recognition. However, the growth in CNN-based image recognition applications raised challenge in executing millions of Multiply and Accumulate (MAC) operations in the state-of-The-Art CNNs. Therefore, GPUs, FPGAs, and ASICs are the feasible solutions for balancing processing speed and power consumption. In this paper, we propose an efficient hardware architecture for CNN that provides high speed, low power, and small area targeting ASIC implementation
FPGA-Based Memristor Emulator Circuit for Binary Convolutional Neural Networks
Binary convolutional neural networks (BCNN) have been proposed in the literature for resource-constrained IoTs nodes and mobile computing devices. Such computing platforms have strict constraints on the power budget, system performance, processing and memory capabilities. Nonetheless, the platforms are still required to efficiently perform classification and matching tasks needed in various applications. The memristor device has shown promising results when utilized for in-memory computing architectures, due to its ability to perform storage and computation using the same physical element
Optimization of fractional-order RLC filters
This paper introduces some generalized fundamentals for fractional-order RL β C α circuits as well as a gradient-based optimization technique in the frequency domain. One of the main advantages of the fractional-order design is that it increases the flexibility and degrees of freedom by means of the fractional parameters, which provide new fundamentals and can be used for better interpretation or best fit matching with experimental results. An analysis of the real and imaginary components, the magnitude and phase responses, and the sensitivity must be performed to obtain an optimal design
Finite precision logistic map between computational efficiency and accuracy with encryption applications
Chaotic systems appear in many applications such as pseudo-random number generation, text encryption, and secure image transfer. Numerical solutions of these systems using digital software or hardware inevitably deviate from the expected analytical solutions. Chaotic orbits produced using finite precision systems do not exhibit the infinite period expected under the assumptions of infinite simulation time and precision. In this paper, digital implementation of the generalized logisticmap with signed parameter is considered. We present a fixed-point hardware realization of a Pseudo-Random
Reevaluation of Performance of Electric Double-layer Capacitors from Constant-current Charge/Discharge and Cyclic Voltammetry
The electric characteristics of electric-double layer capacitors (EDLCs) are determined by their capacitance which is usually measured in the time domain from constant-current charging/discharging and cyclic voltammetry tests, and from the frequency domain using nonlinear least-squares fitting of spectral impedance. The time-voltage and current-voltage profiles from the first two techniques are commonly treated by assuming ideal S s C behavior in spite of the nonlinear response of the device, which in turn provides inaccurate values for its characteristic metrics. In this paper we revisit the
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