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A Stochastic Modeling of the Gain in Waveguide Avalanche Photodetectors (WG-APDs)
Waveguide photodetectors are considered as a promising candidate for high speed photodetection where the tradeoff between the transit time bandwidth and the quantum efficiency is overcome as the incident optical signal and the photogenerated carriers move in perpendicular directions. In WG-Avalanche Photodetectors (WG-APDs), the avalanche multiplication gain enhances the photocurrent of the photodiodes. In these photodiodes, the inaccuracies in the ionizations coefficients of the photogenerated electrons and holes and in the dimensions of the multiplication layer affect the multiplication gain
Comparison and database development of four recent ASM3 model extensions
In the last decade, many Activated Sludge Model No. 3 (ASM3) extensions were proposed to adopt new concepts such as simultaneous storage and growth of heterotrophic organisms and two-step nitrification-denitrification processes. From these ASM3 model extensions, four are included in this study: ASM3 with two-step nitrification-denitrification, ASM3 for simultaneous autotrophic and heterotrophic storage-growth, ASM3 extension for two-step nitrification-denitrification, and ASM3 for simultaneous storage-growth and nitrification-denitrification. The four models are analyzed and compared to the
Parallel and independent true random bitstreams from optical emission spectra of atmospheric microplasma arc discharge
In this study, we propose the possibility of generating several parallel and independent random bitstreams from the time-varying optical emission spectra of an atmospheric pressure air microplasma system. This is achieved by splitting the plasma arc emission into discrete wavelengths using an optical spectrometer and then monitoring the fluctuating intensities of each wavelength as an independent time series. As a proof of concept, we considered eight wavelengths centered at 377.8, 389.1, 425.8, 591.4, 630.5, 673.0, 714.2, and 776.4 nm corresponding to atomic emissions lines from species
Parallel feedback compensation for LDO voltage regulators
A novel low dropout (LDO) voltage regulator compensation technique is demonstrated. A parallel feedback path is used to insert a zero at approximately three times the output pole. The parallel feedback consists of passive elements only and occupies small area. The proposed technique completely eliminates the output pole at different load conditions and results in high LDO bandwidth, which achieves fast output tracking of the input reference and fast recovery of sudden load changes. Moreover, the output pole elimination at different load conditions enables the potential scaling of the error
Fractional canny edge detection for biomedical applications
This paper presents a comparative study of edge detection algorithms based on integer and fractional order differentiation. A performance comparison of the two algorithms has been proposed. Then, a soft computing technique has been applied to both algorithms for better edge detection. From the simulations, it shows that better performance is obtained compared to the classical approach. The noise performances of those algorithms are analyzed upon the addition of random Gaussian noise, as well as the addition of salt and pepper noise. The performance has been compared to peak signal to noise
Design of Positive, Negative, and Alternating Sign Generalized Logistic Maps
The discrete logistic map is one of the most famous discrete chaotic maps which has widely spread applications. This paper investigates a set of four generalized logistic maps where the conventional map is a special case. The proposed maps have extra degrees of freedom which provide different chaotic characteristics and increase the design flexibility required for many applications such as quantitative financial modeling. Based on the maximum chaotic range of the output, the proposed maps can be classified as positive logistic map, mostly positive logistic map, negative logistic map, and
Trajectory control and image encryption using affine transformation of lorenz system
This paper presents a generalization of chaotic systems using two-dimensional affine transformations with six introduced parameters to achieve scaling, reflection, rotation, translation and/or shearing. Hence, the location of the strange attractor in space can be controlled without changing its chaotic dynamics. In addition, the embedded parameters enhance the randomness and sensitivity of the system and control its response. This approach overpasses performing the transformations as post-processing stages by applying them on the resulting time series. Trajectory control through dynamic
New hybrid synchronisation schemes based on coexistence of various types of synchronisation between master-slave hyperchaotic systems
In this paper, we present new approaches to study the co-existence of some types of synchronisation between hyperchaotic dynamical systems. The paper first analyses, based on stability theory of linear continuous-Time systems, the co-existence of the projective synchronisation (PS), the function projective synchronisation (FPS), the full state hybrid function projective synchronisation (FSHFPS) and the generalised synchronisation (GS) between general master and slave hyperchaotic systems. Successively, using Lyapunov stability theory, the coexistence of three different synchronisation types is
High Speed, Approximate Arithmetic Based Convolutional Neural Network Accelerator
Convolutional Neural Networks (CNNs) for Artificial Intelligence (AI) algorithms have been widely used in many applications especially for image recognition. However, the growth in CNN-based image recognition applications raised challenge in executing millions of Multiply and Accumulate (MAC) operations in the state-of-The-Art CNNs. Therefore, GPUs, FPGAs, and ASICs are the feasible solutions for balancing processing speed and power consumption. In this paper, we propose an efficient hardware architecture for CNN that provides high speed, low power, and small area targeting ASIC implementation
FPGA-Based Memristor Emulator Circuit for Binary Convolutional Neural Networks
Binary convolutional neural networks (BCNN) have been proposed in the literature for resource-constrained IoTs nodes and mobile computing devices. Such computing platforms have strict constraints on the power budget, system performance, processing and memory capabilities. Nonetheless, the platforms are still required to efficiently perform classification and matching tasks needed in various applications. The memristor device has shown promising results when utilized for in-memory computing architectures, due to its ability to perform storage and computation using the same physical element
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